1. Field of the Invention
This invention relates generally to bucket brigaded devices, and more particularly is directed to an improved clocking signal drive circuit for the bucket brigaded devices.
2. Description of the Prior Art
In the prior art, bucket brigaded devices (BBDs) are well known which include a series of capacitors, each having a transfer plate and a clocking plate, and each being capable of holding a variable amount of charge. The transfer plate of each capacitor is connected to the transfer plate of the preceding capacitor through a transfer transistor. The clocking plate of each capacitor and the base of each transfer transistor are supplied with a respective one of a plurality of clocking signals. An input signal voltage is applied across the first capacitor in the series of capacitors to place a voltage having a corresponding signal level on the first capacitor. The voltages of the clocking signals are then varied so that the transfer transistor between the first and the second capacitors is turned on. As a result, charge flows from the second capacitor, which is originally charged with a standard voltage level higher than the signal level, to the first capacitor. This charge transfer continues until the voltage across the first capacitor is raised from the signal level to the standard level at which point the voltage at the transfer plate of the first capacitor equals the voltage of the clocking signal supplied to the base of the transfer transistor which causes the transfer transistor to be turned off. This transfer of charge causes the voltage across the second capacitor, which has the same capacitance as the first, to drop from the standard level to the signal level. This process is repeated under the control of the clocking signals, so that the signal level originally placed on the first capacitor is sequentially transferred from one capacitor to another, enabling the BBD to store or delay for a desired length of time the input signal applied to its first capacitor.
In the above described conventional BBDs, since the clocking signal is common to the capacitor and the transfer transistor, there are several defects, which will be described below, by way of example.
1. On the one hand, the dynamic range of the input signal depends on the level of the clocking signal, so that it would be desirable to raise the level of the clocking signal in order to get a large dynamic range. On the other hand, a reverse bias voltage, which also depends on the level of the clocking signal, is applied across, for example, the base-emitter junction of the transistor at a certain phase of the clocking signal, and this reverse bias may not exceed the reverse breakdown voltage of the transistors. In this respect, the dynamic range of the input signal is limited by the reverse breakdown voltage of the transistor and can not be increased in the conventional BBD.
2. Since the clocking signal generator has an output impedance, even if it may be very small, a clocking signal causing a current to flow through a given segment of the BBD causes a change in the level of the clocking signal supplied to the control electrode of the transistors of the other segments. Therefore, the mutual interference between the segments causes distortion, impaired signal-to-noise ratio, and the like, in the output signal.
3. If a recursive filter is formed using the conventional BBD, the efficiency of the components forming this filter can not be selected to be great enough.